1. Field of Invention
The present invention relates generally to methods for use in disk drives for computer systems. More particularly, the present invention relates to method for detecting the existence or non-existence of an 80-conductor cable that connects a host device and a peripheral device in a computer system.
2. Description of the Relevant Art
Data transfer rates between a host device and peripheral devices within a personal computer, PC, system are limited by the bus architecture interconnecting the devices. One type of bus commonly used to interconnect or interface the peripheral drive device to a system bus of a PC is an ATA (AT Attachment) bus, which is a disk drive interface originally designed for the ISA bus of a the IBM PC/AT. As PC systems have become faster and more complex, the definition of the ATA bus has been expanded to include operating modes performing faster data transfer rates. There are several versions of ATA. For example, ATA, also known as IDE, supports one or two peripheral devices, a 16-bit interface and PIO (programmed I/O) modes 0, 1 and 2. ATA-2, also known as Fast ATA and Enhanced IDE, supports faster PIO modes 3 and 4 and multiword DMA modes (1 and 2). Ultra-ATA, also known as Ultra-DMA, ATA-33 and DMA-33, supports DMA mode 2 running at 33 MBps. Commonly assigned U.S. Pat. No. 5,758,188 entitled, "Synchronous DMA Burst Transfer Protocol Having the Peripheral Device Toggle the Strobe Signal Such That Data is Latched Using Both Edges of the Strobe Signal" describes the Ultra-ATA protocol and is incorporated herein by reference.
In order for Ultra ATA to function at rates higher than mode 2, a special 80 conductor cable is required. Both the Small Form Factor (SSF) 8049 and ATA/ATAPI-4 standards specify characteristics of this cable that were designed to allow it to be detected as different than the standard cable by the host controller. Specifically, ATA/ATAPI requires PDIAG- (Passed Diagnostics) signal to be asserted (driven low) by one device to indicate to the other device that it has completed its diagnostics routine. Additionally, CBLID- (Cable ID) is to used only for 80 conductor cable assemblies and connected to the ground pins in the host-side connector. PDIAG-/CBLID- are used interchangeably herein, as well as ATA standard, since both PDIAG- and CBLID- are the same pin on the cable connector. For a 40 conductor cable, PDIAG- and CBLID- are therefore the same signal. Since the 80 conductor cable was made to increase signal integrity for all ATA/ATAPI transfers, the ATA/ATAPI detection method was written so that the cable could be identified (in general) independent of the type of device attached to the cable.
ATA/ATAPI defines a cable detection method wherein the host may sample CBLID- after a power-on or hardware reset in order to detect the presence or absence of an 80-conductor cable assembly by performing the following steps:
a) The host waits until the power on or hardware reset sequence is complete for all devices on the cable; PA1 b) If a device 1 is present, the host issues IDENTIFY DEVICE or IDENTIFY PACKET DEVICE and uses the returned data to determine that Device 1 is compliant with ATA-3 or subsequent standards. Any device compliant with ATA-3 or subsequent standards releases PDIAG- no later than after the first command following a power on or hardware reset sequence.
If the host detects that CBLID- is connected to ground, it is an indication that an 80-conductor cable assembly is installed in the system. If the host detects that this signal is not connected to ground, it is an indication that an 80-conductor cable assembly is not installed in the system.
As shown in FIG. 2a, with an 80 conductor cable, there is nothing that the devices can do to affect the state of CBLID- 26 at the host connector A since the cable is open to the host 25 on that signal and it is grounded inside the host connector itself. With a 40 conductor cable, shown in FIG. 2b, the state of PDIAG- 22 at the host 25 will be the same at all three connectors A', B' and C'. Since ATA/ATAPI requires the devices 23 and 24 to have pull-up resistors on PDIAG- 22, the state of that line 22 will be high when all devices have released that signal. A pull-up resistor causes a signal to Vcc to go high when that signal is not actively driven. After the power-on or reset handshaking and the first command has been sent, the devices should release that line. If the host senses a high, it is assured to be a 40-conductor cable. If the host senses a low, then it is most likely an 80-conductor cable. However, there are ATA/ATAPI devices that do not release PDIAG- when they are used as a slave device but continue to assert that signal beyond the point when they should. With one of these devices as a slave, a 40-conductor cable will be detected as an 80-conductor cable. When a cable is incorrectly detected in this manner, the data transfer rate can be incorrectly set to a speed that cannot be supported by the cable, thereby causing data transfer errors. Another drawback of the ATA/ATAPI detection methodology is the requirement of an additional pin on the host ASIC for each supported port. Since host ASICs generally do not have a pin designated for PDIAG- for each supported port, this detection method reduces the number of available pins that an ASIC designer could otherwise have used for other applications.
Thus, there exists a need for a cable detection method that eliminates the possibility of mistakenly detecting a standard cable for an 80-conductor cable, requires no change to the cable or the ATA/ATAPI device hardware.